Patents

US 10230369 B2: Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstrings

Granted
2019-03-12
Filed
2014-08-28 application 14913454
Type
Utility · 20 claims
Elsewhere
Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗

Abstract

A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.

Source: PVGPATDIS, file of 2026-04-10 (ipg190312.xml).

Assignees

AssigneeTypePlaceAlso on furp.orgSource
STC.UNM 475 patentsUS company or organizationAlbuquerque, NMPVGPATDIS, file of 2026-04-10

Inventors

InventorPlacePatentsPerson pageSource
James PlusquellicAlbuquerque, NM18PVGPATDIS, file of 2026-04-10
James AarestadAlbuquerque, NM3PVGPATDIS, file of 2026-04-10

CPC categories

SubclassCategoryFirst groupSource
H03KPulse techniqueH03K19/00323PVGPATDIS, file of 2026-04-10
H04LTransmission of digital information, e.g. telegraphic communicationH04L9/0662PVGPATDIS, file of 2026-04-10

Cooperative Patent Classification, as currently assigned (one row per subclass).

Assignments and security interests

RecordedWhatFromToReel/frameSource
2019-09-18Government interest
Confirmatory license
UNIVERSITY OF NEW MEXICO signed 2019-06-21NATIONAL SCIENCE FOUNDATION ALEXANDRIA, VA50415/339ECORSEXC, file of 2026-09-25
2018-09-21Assignment
Assignment of assignor's interest
THE REGENTS OF THE UNIVERSITY OF NEW MEXICO signed 2014-11-04STC.UNM ALBUQUERQUE, NM46933/836ECORSEXC, file of 2026-09-25
2018-09-21Assignment
Assignment of assignor's interest
PLUSQUELLIC, JAMES signed 2014-10-08
AARESTAD, JAMES signed 2014-10-15
THE REGENTS OF THE UNIVERSITY OF NEW MEXICO ALBUQUERQUE, NM46933/831ECORSEXC, file of 2026-09-25

Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.

USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.