Patents · inventor
James Aarestad
- Patents
- 3 granted 2019-03-12 to 2020-12-15
- Places
- Albuquerque, NM
- Most often assigned to
- STC.UNM
- Source
- PVGPATDIS, file of 2026-04-10; PatentsView inventor ID fl:ja_ln:aarestad-1
Patents
| Patent | Title | Granted | Assignees | Source |
|---|---|---|---|---|
| US 10868535 | Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstrings | 2020-12-15 | STC.UNM | PVGPATDIS, file of 2026-04-10 |
| US 10666256 | Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstrings | 2020-05-26 | STC.UNM | PVGPATDIS, file of 2026-04-10 |
| US 10230369 | Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstrings | 2019-03-12 | STC.UNM | PVGPATDIS, file of 2026-04-10 |
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. PatentsView groups an inventor’s patents by name, place and co-inventors (disambiguation); a person page link is by name and state, or name and employer.