Patents
US 9911631 B2: Processing system and method for providing a heated etching solution
- Granted
- 2018-03-06
- Filed
- 2014-03-13 application 14209805
- Type
- Utility · 20 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
Embodiments of the invention provide a processing system and a method for processing with a heated etching solution. In one example, tight control over temperature and hydration level of an acidic etching solution is provided. According to one embodiment, the method includes forming the heated etching solution in a first circulation loop, providing the heated etching solution in the process chamber for treating a substrate, forming an additional heated etching solution in a second circulation loop, and supplying the additional heated etching solution to the first circulation loop. According to one embodiment, the processing system includes a process chamber for treating the substrate with the heated etching solution, a first circulation loop for providing the heated etching solution into the process chamber, and a second circulation loop for forming an additional heated etching solution and supplying the additional heated etching solution to the first circulation loop.
Source: PVGPATDIS, file of 2026-04-10 (ipg180306.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| TEL FSI, INC. 34 patents | US company or organization | Chaska, MN | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Kevin L. Siefering | Excelsior, MN | 8 | PVGPATDIS, file of 2026-04-10 | |
| William P. Inhofer | Plymouth, MN | 5 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| H01L | Semiconductor devices not covered by class h10 | H01L21/67017 | PVGPATDIS, file of 2026-04-10 |
| H10P | Generic processes or apparatus for the manufacture or treatment of devices covered by class h10 | H10P72/0422 | PVGPATDIS, file of 2026-04-10 |
| G05B | Control or regulating systems in general; functional elements of such systems; monitoring or testing arrangements for such systems or elements | G05B19/418 | PVGPATDIS, file of 2026-04-10 |
| H10W | Generic packages, interconnections, connectors or other constructional details of devices covered by class h10 | H10W70/045 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2024-12-31 | Assignment Nunc pro tunc assignment | TEL MANUFACTURING AND ENGINEERING OF AMERICA, INC signed 2024-10-11 | TOKYO ELECTRON LIMITED. TOKYO | 69820/650 | ECORSEXC, file of 2026-09-25 |
| 2020-07-30 | Correction Conversion | TEL FSI, INC. signed 2019-12-31 | TEL MANUFACTURING AND ENGINEERING OF AMERICA, INC. CHASKA, MN | 53366/139 | PASDL, file of 2026-10-15 |
| 2014-04-21 | Assignment Assignment of assignor's interest | SIEFERING, KEVIN L. signed 2014-04-14 INHOFER, WILLIAM P. signed 2014-04-21 | TEL FSI, INC. CHASKA, MN | 32717/548 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.