Patents
US 9904665 B2: Partial rasterization of web page tiles
- Granted
- 2018-02-27
- Filed
- 2015-10-15 application 14884635
- Type
- Utility · 20 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A method and device for rasterizing content includes partitioning a webpage into webpage tiles that are associated with a front buffer and a back buffer. A rasterized version of each of the tiles may be stored in the associated front buffer, and each may include new content. If a previous copy of the at least one tile is found in memory, the new content is rasterized onto the previous copy. If a previous copy is not found, and if the proportion of the new content of the at least one tile is less than a threshold, the new content is rasterized onto the front buffer. If the proportion of the new content is above the threshold, and if unchanged content in the at least one tile is complex, then the unchanged content is copied to the back buffer and the new content is rasterized onto the associated back buffer.
Source: PVGPATDIS, file of 2026-04-10 (ipg180227.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| QUALCOMM Innovation Center, Inc. 93 patents | US company or organization | San Diego, CA | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Shiu Wai Hui | King City, CA | 10 | PVGPATDIS, file of 2026-04-10 | |
| Yida Wang | North York, CA | 12 | PVGPATDIS, file of 2026-04-10 | |
| Veluppillai Arulesan | Toronto, CA | 6 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| G09G | Arrangements or circuits for control of indicating devices using static means to present variable information | G09G5/399 | PVGPATDIS, file of 2026-04-10 |
| G06F | Electric digital data processing | G06F40/14 | PVGPATDIS, file of 2026-04-10 |
| G06T | Image data processing or generation, in general | G06T1/60 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2016-02-19 | Assignment Assignment of assignor's interest | ARULESAN, VELUPPILLAI signed 2016-01-28 HUI, SHIU WAI signed 2016-01-28 WANG, YIDA signed 2016-01-28 | QUALCOMM INNOVATION CENTER, INC. SAN DIEGO, CA | 37773/663 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.