Patents
US 9741599 B2: High voltage chuck for a probe station
- Granted
- 2017-08-22
- Filed
- 2016-03-16 application 15072170
- Type
- Utility · 14 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A chuck for testing an integrated circuit includes an upper conductive layer having a lower surface and an upper surface suitable to support a device under test. An upper insulating layer has an upper surface at least in partial face-to-face contact with the lower surface of the upper conductive layer, and a lower surface. A middle conductive layer has an upper surface at least in partial face-to-face contact with the lower surface of the upper insulating layer, and a lower surface.
Source: PVGPATDIS, file of 2026-04-10 (ipg170822.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| Cascade Microtech, Inc. 96 patents | US company or organization | Beaverton, OR | CASCADE MICROTECH INC SEC filer EXACT medium confidence: identical full name, one of each nationally | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Michael E. Simmons | Colton, OR | 13 | PVGPATDIS, file of 2026-04-10 | |
| Kazuki Negishi | Beaverton, OR | 18 | PVGPATDIS, file of 2026-04-10 | |
| Ryan Garrison | Beaverton, OR | 4 | PVGPATDIS, file of 2026-04-10 | |
| Philip Wolf | Beaverton, OR | 10 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| H01L | Semiconductor devices not covered by class h10 | H01L21/6838 | PVGPATDIS, file of 2026-04-10 |
| H10P | Generic processes or apparatus for the manufacture or treatment of devices covered by class h10 | H10P72/78 | PVGPATDIS, file of 2026-04-10 |
| G01R | Measuring electric variables; measuring magnetic variables | G01R31/2601 | PVGPATDIS, file of 2026-04-10 |
| Y10T | Technical subjects covered by former us classification | Y10T279/11 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2021-09-01 | Assignment Assignment of assignor's interest | FORMFACTOR BEAVERTON, INC. signed 2021-08-26 | FORMFACTOR, INC. LIVERMORE, CA | 57393/609 | PASDL, file of 2026-10-15 |
| 2018-07-18 | Name change Change of name | CASCADE MICROTECH, INC. signed 2018-05-14 | FORMFACTOR BEAVERTON, INC. BEAVERTON, OR | 46573/664 | PASDL, file of 2026-10-15 |
| 2016-03-16 | Assignment Assignment of assignor's interest | NEGISHI, KAZUKI signed 2016-03-03 SIMMONS, MICHAEL E. signed 2016-03-03 GARRISON, RYAN signed 2016-03-04 WOLF, PHILIP signed 2016-03-07 | CASCADE MICROTECH, INC. BEAVERTON, OR | 38005/169 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.