Patents
US 9658280 B2: Test board and method for qualifying a printed circuit board assembly and/or repair process
- Granted
- 2017-05-23
- Filed
- 2015-02-11 application 14619506
- Type
- Utility · 6 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A method for qualifying circuit board fabrication, assembly, and repair processes includes establishing primary assembly process specifications and secondary repair process specifications. A group of test circuit boards is assembled using the primary assembly process, with each board having a section of components linked together to provide functional circuits and a section of components daisy-chained together to provide non-functional circuits, and with each section also including SIR test patterns and CAF test patterns. A subset of the assembled test boards is then repaired using the secondary repair process. A sample of each set of the test boards is exposed to test conditions including thermal cycle test conditions, humidity test conditions, and vibration test conditions. Inner layer build quality, surface cleanliness, circuit performance, and solder joint quality are then evaluated using the provided circuitry.
Source: PVGPATDIS, file of 2026-04-10 (ipg170523.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| Foresite, Inc. 4 patents | US company or organization | Kokomo, IN | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Terry L. Munson | Kokomo, IN | 4 | PVGPATDIS, file of 2026-04-10 | |
| Steve Middleton | Noblesville, IN | 3 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| G01R | Measuring electric variables; measuring magnetic variables | G01R31/2812 | PVGPATDIS, file of 2026-04-10 |
| H05K | Printed circuits; casings or constructional details of electric apparatus; manufacture of assemblages of electrical components | H05K3/225 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2016-04-13 | Assignment Assignment of assignor's interest | MIDDLETON, STEVE signed 2016-04-05 MUNSON, TERRY L. signed 2016-04-13 | FORESITE, INC. KOKOMO, IN | 38264/488 | ECORSEXC, file of 2026-09-25 |
| 2015-12-07 | Government interest Confirmatory license | FORESITE, INC. signed 2015-12-02 | MISSILE DEFENSE AGENCY FORT BELVOIR, VA | 37229/573 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.