Patents
US 9612957 B2: Read disturb and data retention handling for NAND devices
- Granted
- 2017-04-04
- Filed
- 2015-03-25 application 14668890
- Type
- Utility · 17 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
Systems, methods, and apparatus are herein disclosed for reducing read disturb and data retention errors in FLASH memory devices designed for long lifespans, such as greater than 10 or 15 years. Read disturb errors can be reduced by maintaining a read counter stored in a volatile memory and a FASTMAP memory block of the FLASH memory. When the read counter meets a threshold, then the associated memory block can be scheduled for scrubbing. Data retentions errors can be reduced by maintaining a last-erase timestamp in metadata of each memory block of a FLASH memory. When the last-erase timestamp associated with a given memory block meets a threshold, then the memory block can be scheduled for scrubbing.
Source: PVGPATDIS, file of 2026-04-10 (ipg170404.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| QUALCOMM Innovation Center, Inc. 93 patents | US company or organization | San Diego, CA | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Tatyana Brokhman | Kiryat Ata, IL | 3 | PVGPATDIS, file of 2026-04-10 | |
| Konstantin Dorfman | Haifa, IL | 2 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| G06F | Electric digital data processing | G06F12/0246 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2015-06-17 | Assignment Assignment of assignor's interest | BROKHMAN, TATYANA signed 2015-06-15 DORFMAN, KONSTANTIN signed 2015-06-15 | QUALCOMM INNOVATION CENTER, INC. SAN DIEGO, CA | 35854/414 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.