Patents
US 9526184 B2: Circuit board multi-functional hole system and method
- Granted
- 2016-12-20
- Filed
- 2012-06-29 application 13537361
- Type
- Utility · 10 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A method and system for constructing a printed circuit board with multifunctional holes. A first conductive material is deposited into a hole in a substrate to form a first plating on an inner surface of the hole. At least one outer portion of the hole is modified to have a larger diameter than the original hole and to remove the first conductive material from that outer portion. A seed material is deposited into the modified hole. An etchant is applied to the hole to non-mechanically remove the first conductive material from the unmodified portion of the hole. Another conductive material is deposited to into the modified hole that adheres to the seed material in the modified outer portion via to form a second plating at the outer portion.
Source: PVGPATDIS, file of 2026-04-10 (ipg161220.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| Viasystems, Inc. 1 patents | US company or organization | Chesterfield, MO | VIASYSTEMS, INC. State business registration EXACT high confidence: identical full name and state | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Roy J. Lecesse | Chesterfield, MO | 1 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| H05K | Printed circuits; casings or constructional details of electric apparatus; manufacture of assemblages of electrical components | H05K3/429 | PVGPATDIS, file of 2026-04-10 |
| C23C | Coating metallic material; coating material with metallic material; surface treatment of metallic material by diffusion into the surface, by chemical conversion or substitution; coating by vacuum evaporation, by sputtering, by ion implantation or by chemical vapour deposition, in general | C23C18/165 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2026-06-02 | Security interest Security interest Security interest | TTM TECHNOLOGIES, INC. signed 2026-06-01 TTM TECHNOLOGIES NORTH AMERICA, LLC signed 2026-06-01 TELEPHONICS CORPORATION signed 2026-06-01 | JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT CHICAGO, IL | 75843/247 | PASDL, file of 2026-10-15 |
| 2026-06-02 | Release of security interest Release of security interest in patents previously recorded at reel/frame (035858/0890) | JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT signed 2026-06-01 | TTM TECHNOLOGIES, INC. (FORMERLY KNOWN AS VIASYSTEMS GROUP, INC. AND VIASYSTEMS, INC.) SANTA ANA, CA TTM TECHNOLOGIES NORTH AMERICA, LLC (FORMERLY KNOWN AS VIASYSTEMS TECHNOLOGIES CORP., L.L.C.) SANTA ANA, CA | 75681/922 | PASDL, file of 2026-10-15 |
| 2026-06-02 | Release of security interest Release of security interest in patents previously recorded at reel/frame (063804/0702) | JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT signed 2026-06-01 | TELEPHONICS CORPORATION SANTA ANA, CA TTM TECHNOLOGIES, INC. SANTA ANA, CA TTM TECHNOLOGIES NORTH AMERICA, LLC SANTA ANA, CA | 75679/852 | PASDL, file of 2026-10-15 |
| 2023-05-30 | Security interest Security interest Patent security agreement (term loan) | TELEPHONICS CORPORATION signed 2023-05-30 TTM TECHNOLOGIES, INC. signed 2023-05-30 TTM TECHNOLOGIES NORTH AMERICA, LLC signed 2023-05-30 | JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT CHICAGO, IL | 63804/745 | PASDL, file of 2026-10-15 |
| 2023-05-30 | Security interest Security interest Patent security agreement (abl) | TELEPHONICS CORPORATION signed 2023-05-30 TTM TECHNOLOGIES, INC. signed 2023-05-30 TTM TECHNOLOGIES NORTH AMERICA, LLC signed 2023-05-30 | JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT CHICAGO, IL | 63804/702 | PASDL, file of 2026-10-15 |
| 2023-05-12 | Merger Merger | VIASYSTEMS GROUP, INC. signed 2017-10-30 | TTM TECHNOLOGIES, INC. SANTA ANA, CA | 63629/313 | ECORSEXC, file of 2026-09-25 |
| 2023-05-12 | Merger Merger | VIASYSTEMS, INC. signed 2017-10-27 | VIASYSTEMS GROUP, INC. COSTA MESA, CA | 63628/122 | ECORSEXC, file of 2026-09-25 |
| 2015-06-08 | Security interest Security interest Patent security agreement-abl | TTM TECHNOLOGIES, INC. signed 2015-05-31 VIASYSTEMS TECHNOLOGIES CORP., L.L.C. signed 2015-05-31 VIASYSTEMS, INC. signed 2015-05-31 | JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT CHICAGO, IL | 35858/890 | ECORSEXC, file of 2026-09-25 |
| 2015-06-08 | Security interest Security interest Patent security agreement-term | TTM TECHNOLOGIES, INC. signed 2015-05-31 VIASYSTEMS TECHNOLOGIES CORP., L.L.C. signed 2015-05-31 VIASYSTEMS, INC. signed 2015-05-31 | JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT CHICAGO, IL | 35851/928 | ECORSEXC, file of 2026-09-25 |
| 2012-07-19 | Assignment Assignment of assignor's interest | LECESSE, ROY J. signed 2012-07-03 | VIASYSTEMS, INC. ST. LOUIS, MO | 28586/191 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.