Patents
US 8392644 B2: System and method for automatic hardware interrupt handling
- Granted
- 2013-03-05
- Filed
- 2010-07-30 application 12847772
- Type
- Utility · 18 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A processing system is provided consisting of an interrupt pin, multiple registers, a stack pointer, and an automatic interrupt system. The multiple registers store a number of processor states values. When the system detects an interrupt on the interrupt pin the system prepares to enter an exception mode where the automatic interrupt system causes an interrupt vector to be fetched, the stack pointer to be updated, and the processor state values to be read in parallel from the registers and stored in memory locations based on the updated stack pointer, prior to the execution of an interrupt service routine. A method for automatic hardware interrupt handling is also presented.
Source: PVGPATDIS, file of 2026-04-10 (ipg130305.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| MIPS Technologies, Inc. 81 patents | US company or organization | Sunnyvale, CA | MIPS TECHNOLOGIES, INC. State business registration EXACT high confidence: identical full name and state MIPS TECHNOLOGIES INC SEC filer EXACT medium confidence: identical full name, one of each nationally | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Erik K. Norden | Munich, DE | 16 | PVGPATDIS, file of 2026-04-10 | |
| David Yiu-Man Lau | San Jose, CA | 8 | PVGPATDIS, file of 2026-04-10 | |
| James Hippisley Robinson | New York, NY | 8 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| G06F | Electric digital data processing | G06F13/26 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2014-06-02 | Assignment Assignment of assignor's interest | BRIDGE CROSSING, LLC signed 2014-01-31 | ARM FINANCE OVERSEAS LIMITED CAMBRIDGE | 33074/58 | ECORSEXC, file of 2026-09-25 |
| 2013-04-12 | Assignment Assignment of assignor's interest | MIPS TECHNOLOGIES, INC. signed 2013-02-06 | BRIDGE CROSSING, LLC LAMBERTVILLE, NJ | 30202/440 | ECORSEXC, file of 2026-09-25 |
| 2010-07-30 | Assignment Assignment of assignor's interest | ROBINSON, JAMES H. signed 2010-06-16 LAU, DAVID signed 2010-07-12 NORDEN, ERIK K. signed 2010-07-22 | MIPS TECHNOLOGIES, INC., SUNNYVALE, CA | 24770/256 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.