Patents
US 8081010 B1: Self restoring logic
- Granted
- 2011-12-20
- Filed
- 2010-11-24 application 12954149
- Type
- Utility · 14 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
Self Restoring Logic (SRL) provides for SEU tolerance in high speed circuits. An SRL cell is designed to be stable in one of two internal states. Upon an SEU event, the SRL cell will not transition between the internal stable states and recover from an SEU. SRL circuits are realized with SRL storage cells driving succeeding SRL storage cells directly or through combinational logic such that the corruption of any one internal state variable in the driving SRL cell and it's the associated combinational output logic can affect at most one internal state variable of the succeeding SRL cell. An SRL circuit does not allow propagation of single SEU faults.
Source: PVGPATDIS, file of 2026-04-10 (ipg111220.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| ICs LLC 5 patents | US company or organization | McCall, ID | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Sterling Whitaker | Albuquerque, NM | 5 | PVGPATDIS, file of 2026-04-10 | |
| Gary Maki | Coeur d'Alene, ID | 5 | PVGPATDIS, file of 2026-04-10 | |
| Lowell H. Miles | Albuquerque, NM | 2 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| H03K | Pulse technique | H03K19/0075 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2010-11-24 | Assignment Assignment of assignor's interest | MILES, LOWELL H. signed 2010-11-23 WHITAKER, STERLING R. signed 2010-11-23 MAKI, GARY K. signed 2010-11-24 | ICS, LLC MCCALL, ID | 25420/52 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.