Patents
US 12755789 B2: Control gate signal for data retention in nonvolatile memory
- Granted
- 2026-10-06
- Filed
- 2024-07-31 application 18790609
- Type
- Utility · 14 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
The nonvolatile memory includes a plurality of nonvolatile memory cells configured to store multiple data states; a word line connected to a control gate of at least one of the plurality of non-volatile memory cells; a control gate line to supply a control gate signal; a word line switch connected between the word line and the control gate line to control the potential applied to the word line from the control gate line; and a memory controller circuit. The memory controller circuit is configured to control a word line potential on the word line and a control gate potential on the control gate line and to control a state of the control gate. The memory controller circuit, when the nonvolatile memory transitions to a not-on state, is further configured to turn off the word line switch and to charge the control gate line to a charged potential.
Source: PTBLXML, file of 2026-10-06 (ipgb20261006.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| Sandisk Technologies, Inc. 4,933 patents | US company or organization | Milpitas, CA | SANDISK TECHNOLOGIES LLC State business registration FUZZY medium confidence: same name (legal endings aside) and state | PTBLXML, file of 2026-10-06 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Abhijith Prakash | Milpitas, CA | 49 | PTBLXML, file of 2026-10-06 | |
| Anubhav Khandelwal | San Jose, CA | 41 | PTBLXML, file of 2026-10-06 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| G11C | Static stores | G11C16/08 | PTBLXML, file of 2026-10-06 |
| H10B | Electronic memory devices | H10B41/10 | PTBLXML, file of 2026-10-06 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2025-04-25 | Release of security interest Partial release of security interests | JPMORGAN CHASE BANK, N.A., AS AGENT signed 2025-04-24 | SANDISK TECHNOLOGIES, INC. MILPITAS, CA | 71382/1 | PASDL, file of 2026-10-15 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.