Patents
US 12754834 B2: Data storage accessible by a host using different communication protocols based on the mating orientation of a reversible connector
- Granted
- 2026-10-06
- Filed
- 2024-11-21 application 18954986
- Type
- Utility · 19 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A solid state device (SSD) includes two data storage controllers, each connected to a corresponding set of NAND chips. The SSD includes a Universal Serial Bus (USB)-C socket for receiving a USB-C plug in one of two mating orientations. One lane of the USB-C socket is connected to the first data storage controller. The second lane is connected to the second data storage controller. The two lanes are used for concurrent communications with a host, with lane communication protocols depending upon the mating orientation. In a first mating orientation, the first lane communication protocol may be USB 10 Gbps and the second lane communication protocol may be USB 2.0. In the second mating orientation, the protocols are reversed. The host thereby has concurrent access to both sets of NAND chips. Similar features are described for use with volatile memory devices such as dynamic random access memory (DRAM) devices.
Source: PTBLXML, file of 2026-10-06 (ipgb20261006.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| SANDISK TECHNOLOGIES, INC. 4,933 patents | US company or organization | Milpitas, CA | SANDISK TECHNOLOGIES LLC State business registration FUZZY medium confidence: same name (legal endings aside) and state | PTBLXML, file of 2026-10-06 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Sudhan Immanuel Godwin | Bangalore, IN | 2 | PTBLXML, file of 2026-10-06 | |
| Aadesh Gupta | Bangalore, IN | PTBLXML, file of 2026-10-06 | ||
| Nihilesh K B | Coimbatore, IN | PTBLXML, file of 2026-10-06 | ||
| Ashok Kumar Kethe | Bangalore, IN | PTBLXML, file of 2026-10-06 | ||
| Niharica | Amritsar, IN | PTBLXML, file of 2026-10-06 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| G06F | Electric digital data processing | G06F12/0246 | PTBLXML, file of 2026-10-06 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2025-04-25 | Release of security interest Partial release of security interests | JPMORGAN CHASE BANK, N.A., AS AGENT signed 2025-04-24 | SANDISK TECHNOLOGIES, INC. MILPITAS, CA | 71382/1 | PASDL, file of 2026-10-15 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.