Patents
US 12685188 B2: Multi-die integrated circuit device with a spark gap
- Granted
- 2026-07-14
- Filed
- 2024-02-01 application 18429509
- Type
- Utility · 19 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
An integrated circuit package having more than one semiconductor die includes a spark gap to provide a current path designed to protect the device. The spark gap can be provided between an exposed portion of a corner lead and an exposed portion of a tie bar and/or between exposed portions of adjacent leads. The spark gap distance is designed to achieve required ratings for a given application. Stacked and side-by-side die configurations are described.
Source: PTBLXML, file of 2026-07-14 (ipgb20260714.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| Allegro MicroSystems, LLC 910 patents | US company or organization | Manchester, NH | ALLEGRO MICROSYSTEMS, INC. SEC filer FUZZY low confidence: same name (legal endings aside), one of each nationally | PTBLXML, file of 2026-07-14 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Washington Lamar | Mont Vernon, NH | 18 | PTBLXML, file of 2026-07-14 | |
| Weidong Wang | Westford, MA | PTBLXML, file of 2026-07-14 | ||
| Maxim Klebanov | Palm Coast, FL | 44 | PTBLXML, file of 2026-07-14 | |
| Sagar Saxena | Manchester, NH | 3 | PTBLXML, file of 2026-07-14 | |
| Yash Shaileshbhai Patel | Manchester, NH | PTBLXML, file of 2026-07-14 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| H10W | Generic packages, interconnections, connectors or other constructional details of devices covered by class h10 | H10W70/465 | PTBLXML, file of 2026-07-14 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2024-02-01 | Assignment Assignment of assignor's interest | LAMAR, WASHINGTON signed 2024-01-31 WANG, WEIDONG signed 2024-01-31 KLEBANOV, MAXIM signed 2024-01-31 SAXENA, SAGAR signed 2024-01-30 PATEL, YASH SHAILESHBHAI signed 2024-01-31 | ALLEGRO MICROSYSTEMS, LLC MANCHESTER, NH | 66319/713 | PASDL, file of 2026-10-15 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.