Patents
US 12681053 B2: Integrated circuit pin for reference voltage and fault communication
- Granted
- 2026-07-14
- Filed
- 2024-02-02 application 18430740
- Type
- Utility · 22 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A sensor integrated circuit includes a sensing circuit configured to generate the sensor output signal and a fault circuit to detect a fault and generate a fault signal indicative of the fault. A combined signal indicative of the fault signal when a fault is detected and indicative of a reference voltage associated with the sensor IC at other times is provided at a shared connection of the sensor IC. Embodiments include a current sensor IC and fault detectors configured to detect one or more faults.
Source: PTBLXML, file of 2026-07-14 (ipgb20260714.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| Allegro MicroSystems, LLC 910 patents | US company or organization | Manchester, NH | ALLEGRO MICROSYSTEMS, INC. SEC filer FUZZY low confidence: same name (legal endings aside), one of each nationally | PTBLXML, file of 2026-07-14 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Matthew Hein | Dallas, TX | 16 | PTBLXML, file of 2026-07-14 | |
| Benjamin Damkroger | Dallas, TX | PTBLXML, file of 2026-07-14 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| G01R | Measuring electric variables; measuring magnetic variables | G01R19/16571 | PTBLXML, file of 2026-07-14 |
| H02H | Emergency protective circuit arrangements | H02H3/08 | PTBLXML, file of 2026-07-14 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2024-02-22 | Assignment Assignment of assignor's interest | HEIN, MATTHEW signed 2024-02-01 DAMKROGER, BENJAMIN signed 2024-02-01 | ALLEGRO MICROSYSTEMS, LLC MANCHESTER, NH | 66525/701 | PASDL, file of 2026-10-15 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.