Patents
US 12567475 B2: Pre-characterizing weak bits for increased low density parity check (LDPC) speed
- Granted
- 2026-03-03
- Filed
- 2024-01-18 application 18415722
- Type
- Utility · 20 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A storage device may speed up error correction by pre-characterizing weak cell information in a memory device. The storage device includes a memory device with cells that may store multiple bits. A controller executes a pre-characterization operation on the memory device to identify a slow cell and/or a fast cell on the memory device. The controller retrieves weak cell information for the slow cell and/or the fast cell. The controller converts the weak cell information into values used by an error correction engine and provides the values to the error correction engine to be used in decoding information retrieved from the memory device.
Source: PTBLXML, file of 2026-03-03 (ipgb20260303.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| Sandisk Technologies, Inc. 4,933 patents | US company or organization | Milpitas, CA | SANDISK TECHNOLOGIES LLC State business registration FUZZY medium confidence: same name (legal endings aside) and state | PTBLXML, file of 2026-03-03 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Adam Jacobvitz | San Jose, CA | 5 | PTBLXML, file of 2026-03-03 | |
| Piyush Dhotre | San Jose, CA | PTBLXML, file of 2026-03-03 | ||
| Niles Yang | San Jose, CA | 53 | PTBLXML, file of 2026-03-03 | |
| Juan Carlos Lee | San Jose, CA | PTBLXML, file of 2026-03-03 | ||
| Eran Sharon | Rishon Lezion, IL | 325 | PTBLXML, file of 2026-03-03 | |
| Idan Goldenberg | Rishon Lezion, IL | 20 | PTBLXML, file of 2026-03-03 | |
| Zhenni Wan | San Jose, CA | 9 | PTBLXML, file of 2026-03-03 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| G11C | Static stores | G11C29/1201 | PTBLXML, file of 2026-03-03 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2025-04-25 | Release of security interest Partial release of security interests | JPMORGAN CHASE BANK, N.A., AS AGENT signed 2025-04-24 | SANDISK TECHNOLOGIES, INC. MILPITAS, CA | 71382/1 | PASDL, file of 2026-10-15 |
| 2025-04-25 | Security interest Security interest Security agreement | SANDISK TECHNOLOGIES, INC. signed 2025-04-24 | JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT CHICAGO, IL | 71050/1 | PASDL, file of 2026-10-15 |
| 2024-12-31 | Assignment Assignment of assignor's interest | SANDISK TECHNOLOGIES LLC signed 2024-12-27 | SANDISK TECHNOLOGIES, INC. MILPITAS, CA | 69796/423 | PASDL, file of 2026-10-15 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.