Patents

US 12282052 B2: Bus authentication and anti-probing architecture

Granted
2025-04-22
Filed
2021-01-29 application 17795997
Type
Utility · 9 claims
Elsewhere
Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗

Abstract

Method and apparatus for detecting in impedance change in a transmission line, such as a line in a computer bus. A CMOS-compatible time domain reflectometer circuit comprising a comparator is embedded in one or more chips and connected to the transmission line. The circuit measures the impedance inhomogeneity pattern (IIP) of the transmission line prior to use, and then repeatedly measures the HP during operation of the transmission line to detect a change in IIP, without Interfering with data transfer through the transmission line. The present invention can detect and locate wire-tapping magnetic probing or snooping, and Trojan and cold boot attacks on interconnecting buses between computer chips or integrated circuits in a computer system, such as on external memory buses.

Source: PVGPATDIS, file of 2026-04-10 (ipg250422.xml).

Assignees

AssigneeTypePlaceAlso on furp.orgSource
University of Rhode Island Board of Trustees 40 patentsUS company or organizationKingston, RIPVGPATDIS, file of 2026-04-10

Inventors

InventorPlacePatentsPerson pageSource
Ken Qing YangSaunderstown, RI8PVGPATDIS, file of 2026-04-10
Tao WeiWest Kingston, RI34PVGPATDIS, file of 2026-04-10
Zhenyu XuKingston, RI52PVGPATDIS, file of 2026-04-10

CPC categories

SubclassCategoryFirst groupSource
G01RMeasuring electric variables; measuring magnetic variablesG01R31/11PVGPATDIS, file of 2026-04-10

Cooperative Patent Classification, as currently assigned (one row per subclass).

Assignments and security interests

RecordedWhatFromToReel/frameSource
2022-11-22Assignment
Assignment of assignor's interest
XU, ZHENYU signed 2022-08-22
WEI, TAO signed 2022-08-23
YANG, KEN QING signed 2022-08-24
UNIVERSITY OF RHODE ISLAND BOARD OF TRUSTEES KINGSTON, RI61853/835ECORSEXC, file of 2026-09-25

Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.

USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.