Patents
US 12125625 B2: Method of assembling a combined transformer/inductor device
- Granted
- 2024-10-22
- Filed
- 2023-02-15 application 18110039
- Type
- Utility · 14 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A combined transformer/inductor device includes a core having a central core leg and an outer core leg spaced apart from the central core leg, an inner bobbin disposed around the central core leg, an outer bobbin disposed around the inner bobbin and the central core leg and having an upper portion having a first oblong portion disposed around the outer core leg, a lower portion having a second oblong portion disposed around the outer core leg, and a central portion disposed around the inner bobbin and the central core leg, a first winding wound around the inner bobbin, and a second winding wound around the outer bobbin, the second winding having a first portion wound around the first oblong portion, a second portion wound around the central portion, and a third portion wound around the second oblong portion.
Source: PVGPATDIS, file of 2026-04-10 (ipg241022.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| Vishay Dale Electronics, LLC 74 patents | US company or organization | Columbus, NE | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Jason Ebner | Barrington, NH | 3 | PVGPATDIS, file of 2026-04-10 | |
| Matthew Foley | Berwick, ME | 8 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| H01F | Magnets; inductances; transformers; selection of materials for their magnetic properties | H01F27/26 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2025-09-16 | Security interest Security interest Security interest | VISHAY DALE ELECTRONICS, INC. (N/K/A VISHAY DALE ELECTRONICS, LLC) signed 2025-09-08 VISHAY-SILICONIX (N/K/A SILICONIX INCORPORATED) signed 2025-09-08 VISHAY GENERAL SEMICONDUCTOR INC. (N/K/A VISHAY GSI, INC.) signed 2025-09-08 VISHAY GENERAL SEMICONDUCTOR, LLC (N/K/A VISHAY GSI, INC.) signed 2025-09-08 VISHAY INTERTECHNOLOGY, INC. signed 2025-09-08 | JPMORGAN CHASE BANK, N.A. CHICAGO, IL | 72272/193 | PASDL, file of 2026-10-15 |
| 2023-02-15 | Assignment Assignment of assignor's interest | EBNER, JASON signed 2019-10-23 FOLEY, MATTHEW signed 2019-10-23 | VISHAY DALE ELECTRONICS, LLC COLUMBUS, NE | 62707/756 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.