Patents

US 11958739 B2: Method for ablating or roughening wafer surfaces

Granted
2024-04-16
Filed
2021-03-01 application 17188985
Type
Utility · 23 claims
Elsewhere
Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗

Abstract

The present invention provides a simple method for ablating a protective thin film on a bulk surface and roughening the underlying bulk. In an embodiment, silicon nitride thin films, which are useful as etch-stop masks in micro- and nano-fabrication, is removed from a silicon wafer's surface using a hand-held “flameless” Tesla-coil lighter. Vias created by a spatially localized electron beam from the lighter allow a practitioner to perform micro- and nano-fabrication without the conventional steps of needing a photoresist and photolithography. Patterning could be achieved with a hard mask or rastering of the spatially confined discharge, offering—with low barriers to rapid use—particular capabilities that might otherwise be out of reach to researchers without access to conventional, instrumentation-intensive micro- and nano-fabrication workflows.

Source: PVGPATDIS, file of 2026-04-10 (ipg240416.xml).

Assignees

AssigneeTypePlaceAlso on furp.orgSource
University of Rhode Island Board of Trustees 40 patentsUS company or organizationKingston, RIPVGPATDIS, file of 2026-04-10

Inventors

InventorPlacePatentsPerson pageSource
Jason Rodger DwyerProvidence, RI5PVGPATDIS, file of 2026-04-10
Y. M. Nuwan D. Y. BandaraGonawala, LK4PVGPATDIS, file of 2026-04-10
Brian SheetzSaunderstown, RI1PVGPATDIS, file of 2026-04-10

CPC categories

SubclassCategoryFirst groupSource
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systemsB81C1/00547PVGPATDIS, file of 2026-04-10
G01NInvestigating or analysing materials by determining their chemical or physical propertiesG01N21/658PVGPATDIS, file of 2026-04-10
H01LSemiconductor devices not covered by class h10H01L21/3086PVGPATDIS, file of 2026-04-10

Cooperative Patent Classification, as currently assigned (one row per subclass).

Assignments and security interests

RecordedWhatFromToReel/frameSource
2023-08-09Assignment
Assignment of assignor's interest
BANDARA, Y.M. NUWAN D.Y. signed 2021-12-20
DWYER, JASON RODGER signed 2021-12-20
SHEETZ, BRIAN signed 2021-12-20
UNIVERSITY OF RHODE ISLAND BOARD OF TRUSTEES KINGSTON, RI64534/870ECORSEXC, file of 2026-09-25
2021-10-04Government interest
Confirmatory license
UNIVERSITY OF RHODE ISLAND signed 2021-03-02NATIONAL SCIENCE FOUNDATION ALEXANDRIA, VA57697/737ECORSEXC, file of 2026-09-25

Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.

USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.