Patents

US 11775312 B2: Look-up table containing processor-in-memory cluster for data-intensive applications

Granted
2023-10-03
Filed
2022-04-11 application 17717947
Type
Utility · 10 claims
Elsewhere
Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗

Abstract

A processing element includes a PIM cluster configured to read data from and write data to an adjacent DRAM subarray, wherein the PIM cluster has a plurality of processing cores, each processing core of the plurality of processing cores containing a look-up table, and a router connected to each processing core, wherein the router is configured to communicate data among each processing core; and a controller unit configured to communicate with the router, wherein the controller unit contains an executable program of operational decomposition algorithms. The look-up tables can be programmable. A DRAM chip including a plurality of DRAM banks, each DRAM bank having a plurality of interleaved DRAM subarrays and a plurality of the PIM clusters configured to read data from and write data to an adjacent DRAM subarray is disclosed.

Source: PVGPATDIS, file of 2026-04-10 (ipg231003.xml).

Assignees

AssigneeTypePlaceAlso on furp.orgSource
Rochester Institute of Technology 110 patentsUS company or organizationRochester, NYRochester Institute of Technology College or university EXACT high confidence: identical full name and state
ROCHESTER INSTITUTE OF TECHNOLOGY Nonprofit EXACT high confidence: identical full name and state
PVGPATDIS, file of 2026-04-10

Inventors

InventorPlacePatentsPerson pageSource
Amlan GangulyHenrietta, NY2PVGPATDIS, file of 2026-04-10
Sai Manoj Pudukotai DinakarraoFalls Church, VA1PVGPATDIS, file of 2026-04-10
Mark ConnollyNewfane, NY3PVGPATDIS, file of 2026-04-10
Purab Ranjan SutradharRochester, NY1PVGPATDIS, file of 2026-04-10
Sathwika BavikadiFairfax, VA1PVGPATDIS, file of 2026-04-10
Mark Allen IndovinaRochester, NY5PVGPATDIS, file of 2026-04-10

CPC categories

SubclassCategoryFirst groupSource
G06FElectric digital data processingG06F9/3004PVGPATDIS, file of 2026-04-10
G06NComputing arrangements based on specific computational modelsG06N3/063PVGPATDIS, file of 2026-04-10
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy useY02D10/00PVGPATDIS, file of 2026-04-10

Cooperative Patent Classification, as currently assigned (one row per subclass).

Assignments and security interests

RecordedWhatFromToReel/frameSource
2023-02-23Assignment
Assignment of assignor's interest
INDOVINA, MARK ALLEN signed 2023-02-04
GANGULY, AMLAN signed 2023-02-15
SUTRADHAR, PURAB RANJAN signed 2023-02-15
CONNOLLY, MARK signed 2023-02-17
ROCHESTER INSTITUTE OF TECHNOLOGY ROCHESTER, NY62779/474ECORSEXC, file of 2026-09-25
2022-04-22Assignment
Assignment of assignor's interest
BAVIKADI, SATHWIKA signed 2022-04-21
DINAKARRAO, SAI MANOJ PUDUKOTAI signed 2022-04-21
GEORGE MASON UNIVERSITY FAIRFAX, VA59679/929ECORSEXC, file of 2026-09-25

Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.

USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.