Patents
US 11397587 B2: Processor core isolation for execution of multiple operating systems on a multicore computer system
- Granted
- 2022-07-26
- Filed
- 2019-04-08 application 16377579
- Type
- Utility · 21 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
Process core isolation for execution of multiple operating systems on a multicore computer system includes booting first and second operating systems (OSs) on a computer system that includes a plurality of processor cores across physical central processing unit(s) (CPUs). Booting the first OS boots the first OS on a first subset of the processor cores. Booting the second OS, different from the first OS, boots the second OS on a second subset of the processor cores. The first and second subsets are mutually exclusive, where a first processor core of a physical CPU of the physical CPUs is included in the first subset and a second processor core of the physical CPU is included in the second subset, and where the first and second OSs execute concurrently on the computer system, and each of the first and second OS executes on only its respective subset of processor core(s).
Source: PVGPATDIS, file of 2026-04-10 (ipg220726.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| Assured Information Security, Inc. 24 patents | US company or organization | Rome, NY | Assured Information Security, Inc. Form D issuer EXACT high confidence: identical full name and state | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Rian Quinn | Highlands Ranch, CO | 6 | PVGPATDIS, file of 2026-04-10 | |
| Connor James Davis | Denver, CO | 2 | PVGPATDIS, file of 2026-04-10 | |
| Harlan Philip White | Elsinore, NY | 2 | PVGPATDIS, file of 2026-04-10 | |
| Erin Grace Riley Hensel | Boulder, CO | 1 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| G06F | Electric digital data processing | G06F9/441 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2019-04-08 | Assignment Assignment of assignor's interest | HENSEL, ERIN GRACE RILEY signed 2019-03-26 DAVIS, CONNOR JAMES signed 2019-03-28 QUINN, RIAN signed 2019-03-30 WHITE, HARLAN PHILIP signed 2019-04-07 | ASSURED INFORMATION SECURITY, INC. ROME, NY | 48825/215 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.