Patents

US 10971540 B2: Method and systems for coupling semiconductor substrates

Granted
2021-04-06
Filed
2016-10-06 application 15287636
Type
Utility · 20 claims
Elsewhere
Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗

Abstract

Systems and methods may be provided for coupling together semiconductor devices. One or more of the semiconductor devices may be provided with an array of bump contacts formed in an etch back process. The bump contacts may be indium bumps. The indium bumps may be formed by depositing a sheet of indium onto a surface of a device substrate, depositing and patterning a layer of photoresist over the indium layer, and selectively etching the indium layer to the surface of the substrate using the patterned photoresist layer to form the indium bumps. The substrate may be an infrared detector substrate. The infrared detector substrate may be coupled to a readout integrated circuit substrate using the bumps.

Source: PVGPATDIS, file of 2026-04-10 (ipg210406.xml).

Assignees

AssigneeTypePlaceAlso on furp.orgSource
FLIR Systems, Inc. 370 patentsUS company or organizationWilsonville, ORFLIR SYSTEMS INC Form D issuer EXACT high confidence: identical full name and state
FLIR SYSTEMS INC SEC filer EXACT medium confidence: identical full name, one of each nationally
PVGPATDIS, file of 2026-04-10

Inventors

InventorPlacePatentsPerson pageSource
Richard E. BornfreundLompoc, CA13PVGPATDIS, file of 2026-04-10
Joseph H. DurhamLompoc, CA3PVGPATDIS, file of 2026-04-10

CPC categories

SubclassCategoryFirst groupSource
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiationH10F39/1843PVGPATDIS, file of 2026-04-10
H01LSemiconductor devices not covered by class h10H01L21/0272PVGPATDIS, file of 2026-04-10
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h10H10P50/264PVGPATDIS, file of 2026-04-10
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h10H10W46/00PVGPATDIS, file of 2026-04-10

Cooperative Patent Classification, as currently assigned (one row per subclass).

Assignments and security interests

RecordedWhatFromToReel/frameSource
2021-11-24Merger
Merger and change of name
FLIR SYSTEMS, INC. signed 2021-05-14
FIREWORK MERGER SUB II, LLC signed 2021-05-14
TELEDYNE FLIR, LLC THOUSAND OAKS, CA58250/271PASDL, file of 2026-10-15
2016-10-25Assignment
Assignment of assignor's interest
BORNFREUND, RICHARD E. signed 2016-10-24
DURHAM, JOSEPH H. signed 2016-10-25
FLIR SYSTEMS, INC. WILSONVILLE, OR40123/466ECORSEXC, file of 2026-09-25

Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.

USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.