Patents
US 10644144 B2: Growth of cubic crystalline phase structure on silicon substrates and devices comprising the cubic crystalline phase structure
- Granted
- 2020-05-05
- Filed
- 2018-11-14 application 16191197
- Type
- Utility · 9 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A transistor comprises a substrate comprising a Group III/V compound semiconductor material having a cubic crystalline phase structure positioned on a hexagonal crystalline phase layer having a first region and a second region, the cubic crystalline phase structure being positioned between the first region and the second region of the hexagonal crystalline phase layer. A source region and a drain region are both positioned in the Group III/V compound semiconductor material. A channel region is in the Group III/V compound semiconductor material. A gate is over the channel region. An optional backside contact can also be formed. A source contact and electrode are positioned to provide electrical contact to the source region. A drain contact and electrode are positioned to provide electrical contact to the drain region. Methods of forming transistors are also disclosed.
Source: PVGPATDIS, file of 2026-04-10 (ipg200505.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| STC.UNM 475 patents | US company or organization | Albuquerque, NM | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Steven R. J. Brueck | Albuquerque, NM | 80 | PVGPATDIS, file of 2026-04-10 | |
| Seung-Chang Lee | Albuquerque, NM | 35 | PVGPATDIS, file of 2026-04-10 | |
| Christian Wetzel | Troy, NY | 7 | PVGPATDIS, file of 2026-04-10 | |
| Mark Durniak | Troy, NY | 6 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| H10D | Inorganic electric semiconductor devices | H10D30/4755 | PVGPATDIS, file of 2026-04-10 |
| H01L | Semiconductor devices not covered by class h10 | H01L21/02381 | PVGPATDIS, file of 2026-04-10 |
| H01S | Devices using the process of light amplification by stimulated emission of radiation [laser] to amplify or generate light; devices using stimulated emission of electromagnetic radiation in wave ranges other than optical | H01S5/3203 | PVGPATDIS, file of 2026-04-10 |
| H10P | Generic processes or apparatus for the manufacture or treatment of devices covered by class h10 | H10P14/2905 | PVGPATDIS, file of 2026-04-10 |
| H10H | Inorganic light-emitting semiconductor devices having potential barriers | H10H20/01335 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2022-09-20 | Assignment Assignment of assignor's interest | WETZEL, CHRISTIAN signed 2019-04-18 DURNIAK, MARK signed 2019-05-10 | RENSSELAER POLYTECHNIC INSTITUTE TROY, NY | 61151/699 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.