Patents
US 10488902 B2: Dynamic multi-core processor voltage scaling based on online core count
- Granted
- 2019-11-26
- Filed
- 2016-02-18 application 15047176
- Type
- Utility · 11 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A device and method for controlling a voltage applied to processor cores of a processor are disclosed. The method includes processing a plurality of tasks on the processor with a plurality of processor cores and applying a rail voltage to the plurality of processor cores. The number of the plurality of processor cores that are active is adjusted, and the rail voltage that is applied to the plurality of processor cores is adjusted based upon the number of the plurality of processor cores that are active.
Source: PVGPATDIS, file of 2026-04-10 (ipg191126.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| QUALCOMM Innovation Center, Inc. 93 patents | US company or organization | San Diego, CA | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Sajjad Pagarkar | San Diego, CA | 2 | PVGPATDIS, file of 2026-04-10 | |
| Karthik Ranganathan Vishwanathan | San Diego, CA | 1 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| G06F | Electric digital data processing | G06F1/26 | PVGPATDIS, file of 2026-04-10 |
| Y02D | Climate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use | Y02D10/00 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
| Recorded | What | From | To | Reel/frame | Source |
|---|---|---|---|---|---|
| 2017-01-04 | Assignment Assignment of assignor's interest | PAGARKAR, SAJJAD signed 2016-12-07 RANGANATHAN VISHWANATHAN, KARTHIK signed 2016-12-13 | QUALCOMM INNOVATION CENTER, INC. SAN DIEGO, CA | 40843/439 | ECORSEXC, file of 2026-09-25 |
Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.