Patents

US 10164629 B2: Method and apparatus for controlling current slew rate of a switching current through an external resistive load

Granted
2018-12-25
Filed
2013-12-18 application 14132970
Type
Utility · 22 claims
Elsewhere
Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗

Abstract

In one aspect of the teachings herein, a switching circuit for switching a power transistor is configured to control the slew rate of the switched load current in a manner that yields substantial independence from the load voltage, based on the use of a Miller-effect compensation capacitor and controllable source resistances for driving the gate or base of the power transistor. In a non-limiting example, a control circuit, such as a microcontroller, uses a set of bidirectional input/output ports to drive the transistor base or gate through a selectable combination of parallel resistors, so that the effective source resistance for transistor turn-on and turn-off is selectable by configuring different combinations of input/output settings for the set of bidirectional input/output ports. Controlling the source resistance in this manner allows the control circuit to set or otherwise control the slew rate of the load current.

Source: PVGPATDIS, file of 2026-04-10 (ipg181225.xml).

Assignees

AssigneeTypePlaceAlso on furp.orgSource
OMRON AUTOMOTIVE ELECTRONICS CO., LTD. 151 patentsForeign company or organizationMcLeansboro, ILPVGPATDIS, file of 2026-04-10

Inventors

InventorPlacePatentsPerson pageSource
Lucretiu PisauHighland Park, IL3PVGPATDIS, file of 2026-04-10

CPC categories

SubclassCategoryFirst groupSource
H03KPulse techniqueH03K17/302PVGPATDIS, file of 2026-04-10

Cooperative Patent Classification, as currently assigned (one row per subclass).

Assignments and security interests

RecordedWhatFromToReel/frameSource
2013-12-18Assignment
Assignment of assignor's interest
PISAU, LUCRETIU signed 2013-12-18OMRON AUTOMOTIVE ELECTRONICS, INC. ST. CHARLES, IL31811/768ECORSEXC, file of 2026-09-25

Documents recorded with the USPTO Assignment Recordation Branch that list this patent. A security interest is a lender’s claim on the patent as collateral; a release ends it.

USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.