Patents
US 12176221 B2: Incorporating semiconductors on a polycrystalline diamond substrate
- Granted
- 2024-12-24
- Filed
- 2019-05-31 application 17612201
- Type
- Utility · 10 claims
- Elsewhere
- Google Patents ↗ · USPTO patent document ↗ · USPTO Patent Center record ↗
Abstract
A method for incorporating semiconductors on a diamond substrate. A buffer layer (e.g., GaN) is grown on a transition layer (e.g., AlN/AlGaN) residing on a substrate. A silicon nitride layer is then grown on the buffer layer. After selectively seeding diamond on the silicon nitride layer, the selective seeding of the diamond is dry etched to form regions with seeded diamond and regions without seeded diamond. The silicon nitride is selectively etched in the regions without seeded diamond and diamond is grown in the regions with seeded diamond forming regions of diamond. Additional Group III-nitride semiconductor material (e.g., GaN) is grown in the etched regions without seeded diamond to fill such regions to reach a level of the regions with diamond. An epitaxial overgrowth of the Group III semiconductor material at and above the level of the regions with diamond is then performed.
Source: PVGPATDIS, file of 2026-04-10 (ipg241224.xml).
Assignees
| Assignee | Type | Place | Also on furp.org | Source |
|---|---|---|---|---|
| Texas State University 22 patents | US company or organization | San Marcos, TX | Texas State University College or university EXACT high confidence: identical full name and state | PVGPATDIS, file of 2026-04-10 |
Inventors
| Inventor | Place | Patents | Person page | Source |
|---|---|---|---|---|
| Raju Ahmed | San Marcos, TX | 11 | PVGPATDIS, file of 2026-04-10 | |
| Edwin L. Piner | San Marcos, TX | 23 | PVGPATDIS, file of 2026-04-10 |
CPC categories
| Subclass | Category | First group | Source |
|---|---|---|---|
| H01L | Semiconductor devices not covered by class h10 | H01L21/02488 | PVGPATDIS, file of 2026-04-10 |
| H10W | Generic packages, interconnections, connectors or other constructional details of devices covered by class h10 | H10W99/00 | PVGPATDIS, file of 2026-04-10 |
| C23C | Coating metallic material; coating material with metallic material; surface treatment of metallic material by diffusion into the surface, by chemical conversion or substitution; coating by vacuum evaporation, by sputtering, by ion implantation or by chemical vapour deposition, in general | C23C16/27 | PVGPATDIS, file of 2026-04-10 |
| C30B | Single-crystal growth ; unidirectional solidification of eutectic material or unidirectional demixing of eutectoid material; refining by zone-melting of material ; production of a homogeneous polycrystalline material with defined structure ; single crystals or homogeneous polycrystalline material with defined structure; after-treatment of single crystals or a homogeneous polycrystalline material with defined structure ; apparatus therefor | C30B25/183 | PVGPATDIS, file of 2026-04-10 |
| H10D | Inorganic electric semiconductor devices | H10D30/475 | PVGPATDIS, file of 2026-04-10 |
| H10P | Generic processes or apparatus for the manufacture or treatment of devices covered by class h10 | H10P14/276 | PVGPATDIS, file of 2026-04-10 |
Cooperative Patent Classification, as currently assigned (one row per subclass).
Assignments and security interests
No recorded assignments or security interests on file for this patent.
USPTO bulk data: PatentsView granted patents, disambiguated (PVGPATDIS) for patents, assignees, inventors, places and CPC categories; the USPTO Patent Assignment Dataset (ECORSEXC) for assignments and security interests. Patents filed in the last 20 years. No claims or full text. Links to other records are by name (and state): EXACT means the identical full name and state; FUZZY means a looser name match, with the confidence shown.